Soumitra Majumder

Email : [email protected]

LinkedIn Profile : www.linkedin.com/in/soumitra-majumder

Staff, Design Group, Synopsys India Pvt. Ltd.

Bangalore, India

Objective:

Seeking a challenging position which involves design and development of high-quality software.

Summary:

• Working in EDA (Electronic Design Automation) domain for 11+ years.
• Experienced at full product life cycle; starting from marketing specification to final productized delivery.
• Experience of cross site product development.
• Keen on working new Ideas, not limited by domain boundaries.

Technical Skills:

• Programming Language : C++, C – over 8 years of active coding.
• Scripting Language : C-Shell, Python (beginner level), TCL.
• Database Language : SQL (beginner level).
• HDL Language : Verilog.
• Programming Environment : Linux, GDB, Perforce.
• EDA Tools : ICC, ICC2.

Education:

• 2003 – 2007: Bachelor of Technology in Electronics and ECE,

IIT-Kharagpur, CGPA – 8.16.

• 2001 – 2003: Higher Secondary from West Bengal board of higher secondary education,

RKM-Narendrapur, Marks- 86.00%.

• 1999 – 2001: Matriculation from West Bengal board of secondary education,

Dumdum Kumar Ashutosh Institution, Marks – 88.50%.

Work Experience:

• Feb 2011 – Present: Synopsys India Pvt. Ltd. Bangalore, India.

Staff Software Engineer

2019 – Present:

• Working as part of Clock-Trunk-Planning (CTP) team.
• This is related to early design planning phase to create clock connections through physical hierarchies.
• Helped stabilize the functionality so that it can be deployed at customer end.
  Created a checker functionality to detect and report design clock issues that are related to CTP.

2014 – 2018: 

• Working as part of ICC2 Abstraction and Top-Level-Optimization team.
• This is related to interface logic modelling. Role involved modeling of physical objects and merging of abstract changes through netlist graph.
• Helped create an infrastructure of distributed processing of independent blocks for better turnaround time.

2011 – 2014:

• Worked as part of ICC and ICC2 data model team.
• Helped create a lightweight model for physical data transformation in ICC2 with widespread usage.
• Added double patterning data model support for advanced technology nodes in ICC.

• July 2007 - Oct 2010: Mentor Graphics (India) Pvt. Ltd. Noida, India.

Senior Member Technical

• Worked in backend compiler group supporting multiple frontend tools.
• Role involved producing structural netlist from various hardware description languages like Verilog, VHDL, System Verilog.
• Helped develop rule checkers for HDS wherein various design-wide and synthesis related rules are checked to reduce design cycle.

• May 2006 – June 2006: Mentor Graphics (India) Pvt. Ltd. Noida, India.

Summer Intern

• Worked on fragment parsing on files that might not be in a standard Verilog syntax.
• Was offered a pre-placement offer for the work done.

Relevant Coursework:

• Undergraduate: Design and analysis of algorithm, Data Structure & Object Representation, Computer Organization & Operating System,
  VLSI Engineering, Electronic Design Automation, Information Theory & Coding.
• Certification courses: Python for Everybody (University of Michigan), Managing Big Data with MySQL (Duke University),
  Building Web Applications in PHP (University of Michigan), Machine Learning (Stanford University).

Personal Details:

• Languages spoken : English, Bengali, Hindi.
• Present address : Pai Layout, Bangalore-560016.
• Permanent address : Purba Sinthee, Dumdum, Kolkata-700030.
• Interests : Popular science, reading.